encode circuit meaning in Chinese
编码电路
Examples
- The chapter of hardware design first expounds the whole design . the several primary circuit are designed , including power circuit , controlling circuit , detecting circuit and the dsp quadrature encode circuit
硬件部分先作了整体设计的论述，然后具体介绍了功率电路、控制电路、检测电路以及dsp的正交解码电路。 - As the random structure of ldpc codes made it difficult to encoding in hardware and few mathematic methods has been found for analyzing these codes , many constructed ldpc codes were investigated to simplify encoding circuit and to reduce the complexity of analyses
随机构造的ldpc码缺乏系统的分析理论,且编码部分的硬件实现困难,成为ldpc码应用的一个瓶颈,因此许多的结构化的ldpc码被相继提出,以简化编码的硬件复杂度和理论分析的难度。 - Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc , according to the system performance , the specifications of sub _ adc is obtained , while the sub _ adc including the preamplifier - latch comparator , the reference ladder resistance and the clock - control encode circuits are discussed in detail
基于对10 - bit100mspspipelinedcmosadc系统结构的分析研究,结合系统性能确定了子adc的指标要求,详细讨论并设计了子adc单元模块的设计,包括预放大锁存比较器,参考电阻串和时钟控制编码电路。 - Secondly , compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory , a novel topology of cmos preamplifier latch comparator circuit is presented . considering trade - off between kickback noise and power dissipation , reference resistance value is optimized . according to the encode demands of different stage resolution , clock - control encode circuit is designed
其后,在具体的子adc设计中,对比各比较器类型的优缺点,并基于预放大锁存快速比较理论,提出一种新型高速低功耗预放大锁存比较器电路拓扑;根据adc系统所允许的参考电压最大波动限制,在回馈噪声对输入参考电平的影响和功耗之间折衷,确定优化的参考电阻串阻值;根据不同级精度的编码要求,设计出时钟控制编码电路。